README

@@ -3,8 +3,8 @@ This is the buildsystem for the OpenWrt Linux distribution.
 Please use "make menuconfig" to configure your appreciated
 configuration for the toolchain and firmware.
 
-You need to have installed gcc, binutils, bzip2, flex, python, perl
-make, find, grep, diff, unzip, gawk, getopt, libz-dev and libc headers.
+You need to have installed gcc, binutils, bzip2, flex, python, perl, make,
+find, grep, diff, unzip, gawk, getopt, subversion, libz-dev and libc headers.
 
 Run "./scripts/feeds update -a" to get all the latest package definitions
 defined in feeds.conf / feeds.conf.default respectively

feeds.conf.default

 src-git packages https://github.com/openwrt/packages.git;for-14.07
-src-git luci http://git.openwrt.org/project/luci.git
+src-git luci https://github.com/openwrt/luci.git;luci-0.12
 src-git routing https://github.com/openwrt-routing/packages.git;for-14.07
 src-git telephony http://git.openwrt.org/feed/telephony.git;for-14.07
 src-git management https://github.com/openwrt-management/packages.git;for-14.07
-src-git oldpackages http://git.openwrt.org/packages.git^95ba3e7d7bce60f9b3d6c6e8fc0934a6af8a4e34
+src-git oldpackages http://git.openwrt.org/14.07/packages.git
 #src-svn xwrt http://x-wrt.googlecode.com/svn/trunk/package
 #src-svn phone svn://svn.openwrt.org/openwrt/feeds/phone
 #src-svn efl svn://svn.openwrt.org/openwrt/feeds/efl

include/kernel-version.mk

@@ -2,20 +2,20 @@
 
 LINUX_RELEASE?=1
 
-ifeq ($(LINUX_VERSION),3.10.49)
-  LINUX_KERNEL_MD5SUM:=9774e12764e740d49c80eda77d0ef3eb
-endif
+LINUX_VERSION-3.10 = .49
 
-# disable the md5sum check for unknown kernel versions
-LINUX_KERNEL_MD5SUM?=x
+LINUX_KERNEL_MD5SUM-3.10.49 = 9774e12764e740d49c80eda77d0ef3eb
+
+ifdef KERNEL_PATCHVER
+  LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
+endif
 
 split_version=$(subst ., ,$(1))
 merge_version=$(subst $(space),.,$(1))
 KERNEL_BASE=$(firstword $(subst -, ,$(LINUX_VERSION)))
 KERNEL=$(call merge_version,$(wordlist 1,2,$(call split_version,$(KERNEL_BASE))))
-ifeq ($(firstword $(call split_version,$(KERNEL_BASE))),2)
-  KERNEL_PATCHVER=$(call merge_version,$(wordlist 1,3,$(call split_version,$(KERNEL_BASE))))
-else
-  KERNEL_PATCHVER=$(KERNEL)
-endif
+KERNEL_PATCHVER ?= $(KERNEL)
 
+# disable the md5sum check for unknown kernel versions
+LINUX_KERNEL_MD5SUM:=$(LINUX_KERNEL_MD5SUM-$(strip $(LINUX_VERSION)))
+LINUX_KERNEL_MD5SUM?=x

include/ltqtapi.mk

 LTQ_TAPI_BUILD_DEPENDS:=TARGET_lantiq_xway:kmod-ltq-tapi \
 	TARGET_lantiq_xway:kmod-ltq-vmmc \
+	TARGET_lantiq_xrx200:kmod-ltq-tapi \
+	TARGET_lantiq_xrx200:kmod-ltq-vmmc \
 	TARGET_lantiq_falcon:kmod-ltq-tapi \
 	TARGET_lantiq_falcon:kmod-ltq-vmmc
 
-LTQ_TAPI_TARGET:=@(TARGET_lantiq_falcon||TARGET_lantiq_xway)
+LTQ_TAPI_TARGET:=@(TARGET_lantiq_falcon||TARGET_lantiq_xway||TARGET_lantiq_xrx200)
 
 LTQ_TAPI_DEPENDS:=$(LTQ_TAPI_TARGET) \
 	+TARGET_lantiq_xway:kmod-ltq-tapi \
 	+TARGET_lantiq_xway:kmod-ltq-vmmc \
+	+TARGET_lantiq_xrx200:kmod-ltq-tapi \
+	+TARGET_lantiq_xrx200:kmod-ltq-vmmc \
 	+TARGET_lantiq_falcon:kmod-ltq-tapi \
 	+TARGET_lantiq_falcon:kmod-ltq-vmmc

include/version.mk

@@ -18,16 +18,16 @@ PKG_CONFIG_DEPENDS += \
 	CONFIG_VERSION_HWREV \
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),$(REVISION))
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),14.07)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),14.07)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),Barrier Breaker)
 
 VERSION_NICK:=$(call qstrip,$(CONFIG_VERSION_NICK))
 VERSION_NICK:=$(if $(VERSION_NICK),$(VERSION_NICK),$(RELEASE))
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.openwrt.org/snapshots/trunk/%T/packages)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.openwrt.org/%n/%v/%S/packages)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)

package/base-files/files/etc/init.d/system

@@ -12,8 +12,6 @@ validate_system_section()
 		'buffersize:uinteger' \
 		'timezone:string:UTC' \
 		'zonename:string'
-
-	return $?
 }
 
 system_config() {

package/base-files/files/lib/upgrade/keep.d/base-files-essential

@@ -4,6 +4,7 @@
 /etc/group
 /etc/passwd
 /etc/profile
+/etc/shadow
 /etc/shells
 /etc/sysctl.conf
 /etc/rc.local

package/base-files/image-config.in

@@ -211,7 +211,7 @@ endif
 
 menuconfig PER_FEED_REPO
 	bool "Separate feed repositories" if IMAGEOPT
-	default n
+	default y
 	help
 		If set, a separate repository is generated within bin/*/packages/
 		for the core packages and each enabled feed.

package/devel/valgrind/Makefile

@@ -77,7 +77,7 @@ define Package/valgrind/description
 	to speed up and reduce memory use of your programs.
 endef
 
-CPU := $(patsubst x86_64,amd64,$(patsubst x86,i386,$(LINUX_KARCH)))
+CPU := $(patsubst x86_64,amd64,$(patsubst x86,i386,$(patsubst um,$(ARCH),$(LINUX_KARCH))))
 
 CONFIGURE_VARS += \
 	UNAME_R=$(LINUX_VERSION)

package/kernel/brcm2708-gpu-fw/Makefile

@@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=brcm2708-gpu-fw
-PKG_REV:=94e1b8014dfa69701d0432088acb11ae01130d38
+PKG_REV:=e25efc4545d0cef7c49c82e770b3e4ccfc8aba4c
 PKG_VERSION:=20140226
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_REV).tar.gz
 PKG_SOURCE_URL:=https://github.com/Hexxeh/rpi-firmware/archive/
-PKG_MD5SUM:=41fab917f6cda3ea74f127293ed1e8ce
+PKG_MD5SUM:=b1bb6b1063c4f920314274edd39c35e6
 
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_REV)
 

package/kernel/broadcom-wl/files/lib/wifi/broadcom.sh

@@ -450,7 +450,8 @@ detect_broadcom() {
 config wifi-device  wl${i}
 	option type     broadcom
 	option channel  ${channel:-11}
-
+	option txantenna 3
+	option rxantenna 3
 	# REMOVE THIS LINE TO ENABLE WIFI:
 	option disabled 1
 

package/kernel/lantiq/ltq-tapi/Makefile

@@ -27,7 +27,8 @@ define KernelPackage/ltq-tapi
   SUBMENU:=Voice over IP
   TITLE:=Lantiq TAPI subsystem
   URL:=http://www.lantiq.com/
-  DEPENDS:=$(LTQ_TAPI_TARGET) +kmod-ltq-ifxos
+  #DEPENDS:=$(LTQ_TAPI_TARGET) +kmod-ltq-ifxos
+  DEPENDS:=+kmod-ltq-ifxos
   FILES:=$(PKG_BUILD_DIR)/src/drv_tapi.ko
   AUTOLOAD:=$(call AutoLoad,20,drv_tapi)
 endef

package/kernel/lantiq/ltq-vmmc/Config.in

@@ -13,10 +13,10 @@ choice
 #		bool "AR9 family"
 #		depends on TARGET_lantiq_ar9
 
-#	config VOICE_CPE_VMMC_WITH_DEVICE_VR9
-#		bool "VR9 family"
-#		depends on TARGET_lantiq_vr9
-#	
+	config VOICE_CPE_VMMC_WITH_DEVICE_VR9
+		bool "VR9 family"
+		depends on TARGET_lantiq_xrx200
+	
 	config VOICE_VMMC_WITH_DEVICE_FALCON
 		bool "FALC-ON"
 		depends on (TARGET_lantiq_falcon||TARGET_lantiq_falcon_stable)

package/kernel/lantiq/ltq-vmmc/Makefile

@@ -120,7 +120,19 @@ endif
 
 ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_VR9),y)
   CONFIGURE_ARGS += --with-device=VR9
-  # TODO: add fw/coef
+  FW_TARGET:=voice_ar9_firmware.bin
+  FW_SOURCE:=voip_R2.3.1.7.0-enc.bin
+  FW_FILE=fw_voip_vr9-2.3.1.7.0.tar.gz
+  FW_MD5SUM:=635edd1e2af8ca249cc7e80b779f3270
+  FW_DOWNLOAD:=1
+  COEF_SRC:=ETSI_3_10.BIN
+  COEF_TARGET:=vr9_bbd_fxs.bin
+  COEF_FILE:=coef_voip_vr9-0.9.3.tar.gz
+  COEF_MD5SUM:=66fa5c6a4110726b1f8658359b8008e6
+  COEF_DOWNLOAD:=1
+
+  COEF_SRC_FXO:=FXO_ETSI_0_0.BIN
+  COEF_TARGET_FXO:=vr9_bbd.bin
 endif
 
 define Download/firmware
@@ -163,6 +175,7 @@ define KernelPackage/ltq-vmmc/install
 	$(CP) $(PKG_BUILD_DIR)/firmware/$(FW_SOURCE) $(1)/$(FW_DIR)/$(FW_TARGET)
 	ln -s /$(FW_DIR)/$(FW_TARGET) $(1)/$(FW_DIR)/$(FW_TARGET_GENERIC)
 	$(CP) $(PKG_BUILD_DIR)/coef/$(COEF_SRC) $(1)/$(FW_DIR)/$(COEF_TARGET)
+	$(CP) $(PKG_BUILD_DIR)/coef/$(COEF_SRC_FXO) $(1)/$(FW_DIR)/$(COEF_TARGET_FXO)
 	ln -s /$(FW_DIR)/$(COEF_TARGET) $(1)/$(FW_DIR)/$(COEF_TARGET_GENERIC)
 endef
 

package/kernel/lantiq/ltq-vmmc/patches/500-ar9_vr9.patch

+--- drv_vmmc-1.9.0_orig/src/mps/drv_mps_vmmc_ar9.c	2010-03-08 14:08:30.000000000 +0100
++++ drv_vmmc-1.9.0/src/mps/drv_mps_vmmc_ar9.c	2014-10-14 21:49:20.000000000 +0200
+@@ -30,15 +30,24 @@
+ #include "ifxos_interrupt.h"
+ 
+ /* board specific headers */
++#if !defined CONFIG_LANTIQ
+ #include <asm/ifx/ifx_regs.h>
+ #include <asm/ifx_vpe.h>
+ #include <asm/ifx/ifx_gpio.h>
++#endif
++
++#include <lantiq_soc.h>
++#include <vpe.h>
+ 
+ /* device specific headers */
+ #include "drv_mps_vmmc.h"
+ #include "drv_mps_vmmc_dbg.h"
+ #include "drv_mps_vmmc_device.h"
+
++const void (*ifx_bsp_basic_mps_decrypt)(unsigned int addr, int n) = NULL;
++
++#define IFX_MPS_SRAM IFXMIPS_MPS_SRAM
++
+ /* ============================= */
+ /* Local Macros & Definitions    */
+ /* ============================= */
+@@ -108,6 +108,7 @@
+  */
+ IFX_int32_t ifx_mps_fw_wdog_start_ar9()
+ {
++   return IFX_SUCCESS; /* FIXME - Disable start wdog... */
+    /* vpe1_wdog_ctr should be set up in u-boot as
+       "vpe1_wdog_ctr_addr=0xBF2001B0"; protection from incorrect or missing
+       setting */
+@@ -292,7 +302,19 @@
+          decryption. Subtract sizeof(u32) from length to avoid decryption
+          of data beyond the FW image code */
+       pFWDwnld->length -= sizeof(IFX_uint32_t);
++      switch(ltq_soc_type()) {
++   	   case SOC_TYPE_AR9:
++		   ifx_bsp_basic_mps_decrypt = (const void (*)(unsigned int, int))0xbf0017c4;
++		   break;
++	   case SOC_TYPE_VR9:
++		   ifx_bsp_basic_mps_decrypt = (const void (*)(unsigned int, int))0xbf001ea4;
++		   break;
++	   case SOC_TYPE_VR9_2:
++		   ifx_bsp_basic_mps_decrypt = (const void (*)(unsigned int, int))0xbf001f38;
++		   break;
++      }
++      if (ifx_bsp_basic_mps_decrypt)
+       ifx_bsp_basic_mps_decrypt((IFX_uint32_t)cpu1_base_addr, pFWDwnld->length);
+    }
+ 
+    /* calculate CRC32 checksum over downloaded image */
+@@ -306,7 +320,7 @@
+          TRACE (MPS, DBG_LEVEL_HIGH,
+                 ("MPS: FW checksum error: img=0x%08x calc=0x%08x\r\n",
+                 pFW_img_data->crc32, cksum));
+-         return IFX_ERROR;
++         /* return IFX_ERROR; -- FIXME */ 
+       }
+    }
+    else
+@@ -454,62 +473,62 @@
+ #endif /* DEBUG */
+ 
+    /* reset SmartSLIC */
+-   IFXOS_LOCKINT (flags);
+-   if (ifx_gpio_pin_reserve
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO port/pin reservation error.\r\n",
+-              __FILE__, __func__, __LINE__));
+-   }
++//   IFXOS_LOCKINT (flags);
++//   if (ifx_gpio_pin_reserve
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO port/pin reservation error.\r\n",
++//              __FILE__, __func__, __LINE__));
++//   }
+    /* P1_ALTSEL0.15 = 0 */
+-   if (ifx_gpio_altsel0_clear
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL0.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
++//   if (ifx_gpio_altsel0_clear
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL0.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
+    /* P1_ALTSEL1.15 = 0 */
+-   if (ifx_gpio_altsel1_clear
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL1.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
++//   if (ifx_gpio_altsel1_clear
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL1.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
+    /* P1_DIR.15 = 1 */
+-   if (ifx_gpio_dir_out_set
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO error setting DIR.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
++//   if (ifx_gpio_dir_out_set
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO error setting DIR.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
+    /* P1_OD.15 = 1 */
+-   if (ifx_gpio_open_drain_set
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO error setting OD.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
++//   if (ifx_gpio_open_drain_set
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO error setting OD.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
+    /* P1_OUT.15 = 0 */
+-   if (ifx_gpio_output_clear
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO error clearing OUT.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
+-   if (ifx_gpio_pin_free
+-       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
+-   {
+-      TRACE (MPS, DBG_LEVEL_HIGH,
+-             (KERN_ERR "[%s %s %d]: GPIO port/pin freeing error.\r\n", __FILE__,
+-              __func__, __LINE__));
+-   }
+-   IFXOS_UNLOCKINT (flags);
++//   if (ifx_gpio_output_clear
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO error clearing OUT.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
++//   if (ifx_gpio_pin_free
++//       (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
++//   {
++//      TRACE (MPS, DBG_LEVEL_HIGH,
++//             (KERN_ERR "[%s %s %d]: GPIO port/pin freeing error.\r\n", __FILE__,
++//              __func__, __LINE__));
++//   }
++//   IFXOS_UNLOCKINT (flags);
+ 
+    /* recalculate and compare the firmware checksum */
+    ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
+--- drv_vmmc-1.9.0_orig/src/drv_vmmc_amazon_s.h	2009-12-03 17:20:34.000000000 +0100
++++ drv_vmmc-1.9.0/src/drv_vmmc_amazon_s.h	2014-10-16 10:30:48.000000000 +0200
+@@ -16,7 +16,7 @@
+ 
+ 
+ #if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
+-#include <asm/ifx/ifx_gpio.h>
++//#include <asm/ifx/ifx_gpio.h>
+ #else
+ #error no system selected
+ #endif
+@@ -27,45 +27,6 @@
+ */
+ #define VMMC_PCM_IF_CFG_HOOK(mode, GPIOreserved, ret) \
+ do { \
+-   ret = VMMC_statusOk; \
+-   /* Reserve P0.0 as TDM/FSC */ \
+-   if (!GPIOreserved) \
+-      ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel0_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel1_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID);\
+-   \
+-   /* Reserve P1.9 as TDM/DO */ \
+-   if (!GPIOreserved) \
+-      ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel0_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel1_clear(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   \
+-   /* Reserve P2.9 as TDM/DI */ \
+-   if (!GPIOreserved) \
+-      ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(2, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel0_clear(IFX_GPIO_PIN_ID(2, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel1_set(IFX_GPIO_PIN_ID(2, 9), VMMC_TAPI_GPIO_MODULE_ID);\
+-   ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(2, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   \
+-   /* Reserve P2.8 as TDM/DCL */ \
+-   if (!GPIOreserved) \
+-      ret |= ifx_gpio_pin_reserve(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel0_clear(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_altsel1_set(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_open_drain_set(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   \
+-   if (mode == 2) { \
+-      /* TDM/FSC+DCL Master */ \
+-      ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-      ret |= ifx_gpio_dir_out_set(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   } else { \
+-      /* TDM/FSC+DCL Slave */ \
+-      ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-      ret |= ifx_gpio_dir_in_set(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+-   } \
+ } while(0);
+ 
+ /**
+@@ -73,11 +34,6 @@
+ */
+ #define VMMC_DRIVER_UNLOAD_HOOK(ret) \
+ do { \
+-   ret = VMMC_statusOk; \
+-   ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(0, 0), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(1, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(2, 9), VMMC_TAPI_GPIO_MODULE_ID); \
+-   ret |= ifx_gpio_pin_free(IFX_GPIO_PIN_ID(2, 8), VMMC_TAPI_GPIO_MODULE_ID); \
+ } while (0)
+ 
+ #endif /* _DRV_VMMC_AMAZON_S_H */

package/kernel/mac80211/Makefile

@@ -328,7 +328,7 @@ endef
 
 define KernelPackage/rt2800-soc
 $(call KernelPackage/rt2x00/Default)
-  DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883) +kmod-rt2800-mmio +kmod-rt2800-lib
+  DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883||TARGET_ramips_mt7620a||TARGET_ramips_mt7620n) +kmod-rt2800-mmio +kmod-rt2800-lib
   TITLE += (RT28xx/RT3xxx SoC)
   FILES := \
 	$(PKG_BUILD_DIR)/drivers/net/wireless/rt2x00/rt2x00soc.ko \

package/kernel/mac80211/files/regdb.txt

@@ -6,7 +6,7 @@ country 00:
 	# Channel 14. Only JP enables this and for 802.11b only
 	(2474 - 2494 @ 20), (20), NO-IR, NO-OFDM
 	# Channel 36 - 48
-	(5170 - 5250 @ 160), (20), NO-IR
+	(5170 - 5250 @ 160), (20)
 	# Channel 52 - 64
 	(5250 - 5330 @ 160), (20), NO-IR, DFS
 	# Channel 100 - 144

package/kernel/mac80211/patches/300-pending_work.patch

+commit 77980bee5f1f743b46f8749185aca28b8ec69741
+Author: Johannes Berg <johannes.berg@intel.com>
+Date:   Mon Nov 3 14:29:09 2014 +0100
+
+    mac80211: fix use-after-free in defragmentation
+    
+    Upon receiving the last fragment, all but the first fragment
+    are freed, but the multicast check for statistics at the end
+    of the function refers to the current skb (the last fragment)
+    causing a use-after-free bug.
+    
+    Since multicast frames cannot be fragmented and we check for
+    this early in the function, just modify that check to also
+    do the accounting to fix the issue.
+    
+    Cc: stable@vger.kernel.org
+    Reported-by: Yosef Khyal <yosefx.khyal@intel.com>
+    Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+
+commit e252be2d718dada0abd72208a44b9f1b63919883
+Author: Hauke Mehrtens <hauke@hauke-m.de>
+Date:   Wed Nov 5 23:31:07 2014 +0100
+
+    b43: fix NULL pointer dereference in b43_phy_copy()
+    
+    phy_read and phy_write are not set for every phy any more sine this:
+    commit d342b95dd735014a590f9051b1ba227eb54ca8f6
+    Author: Rafał Miłecki <zajec5@gmail.com>
+    Date:   Thu Jul 31 21:59:43 2014 +0200
+    
+        b43: don't duplicate common PHY read/write ops
+    
+    b43_phy_copy() accesses phy_read and phy_write directly and will fail
+    with some phys. This patch fixes the regression by using the
+    b43_phy_read() and b43_phy_write() functions which should be used for
+    read and write access.
+    
+    This should fix this bug report:
+    https://bugzilla.kernel.org/show_bug.cgi?id=87731
+    
+    Reported-by: Volker Kempter <v.kempter@pe.tu-clausthal.de>
+    Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+
+commit ddf93ad61cb009ed05ff2547923fb269a3604408
+Author: Miaoqing Pan <miaoqing@qca.qualcomm.com>
+Date:   Thu Nov 6 10:52:23 2014 +0530
+
+    ath9k: Fix RTC_DERIVED_CLK usage
+    
+    Based on the reference clock, which could be 25MHz or 40MHz,
+    AR_RTC_DERIVED_CLK is programmed differently for AR9340 and AR9550.
+    But, when a chip reset is done, processing the initvals
+    sets the register back to the default value.
+    
+    Fix this by moving the code in ath9k_hw_init_pll() to
+    ar9003_hw_override_ini(). Also, do this override for AR9531.
+    
+    Cc: stable@vger.kernel.org
+    Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com>
+    Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+
+commit 536b05e91ac2715942f792184c26beb43dbaa522
+Author: Felix Fietkau <nbd@openwrt.org>
+Date:   Mon Oct 27 11:50:28 2014 +0100
+
+    mac80211: flush keys for AP mode on ieee80211_do_stop
+    
+    Userspace can add keys to an AP mode interface before start_ap has been
+    called. If there have been no calls to start_ap/stop_ap in the mean
+    time, the keys will still be around when the interface is brought down.
+    
+    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit c35074725eb19f353beb5f71266f9e985e46f583
+Author: Felix Fietkau <nbd@openwrt.org>
+Date:   Wed Oct 22 18:16:14 2014 +0200
+
+    ath9k_common: always update value in ath9k_cmn_update_txpow
+    
+    In some cases the limit may be the same as reg->power_limit, but the
+    actual value that the hardware uses is not up to date. In that case, a
+    wrong value for current tx power is tracked internally.
+    Fix this by unconditionally updating it.
+    
+    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit 11f17631d9bf2a9e910dac7d09ba4581f5693831
+Author: Felix Fietkau <nbd@openwrt.org>
+Date:   Tue Sep 9 09:48:30 2014 +0200
+
+    ath9k_hw: fix PLL clock initialization for newer SoC
+    
+    On AR934x and newer SoC devices, the layout of the AR_RTC_PLL_CONTROL
+    register changed. This currently breaks at least 5/10 MHz operation.
+    AR933x uses the old layout.
+    
+    It might also have been causing other stability issues because of the
+    different location of the PLL_BYPASS bit which needs to be set during
+    PLL clock initialization.
+    
+    This patch also removes more instances of hardcoded register values in
+    favor of properly computed ones with the PLL_BYPASS bit added.
+    
+    Reported-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
+    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit 0fecedddd4a0945873db1bd230ec6a168b3cc4fe
+Author: Felix Fietkau <nbd@openwrt.org>
+Date:   Mon Sep 8 18:35:08 2014 +0200
+
+    ath9k_hw: reduce ANI spur immunity setting on HT40 extension channel
+    
+    The cycpwr_thr1 value needs to be lower on the extension channel than on
+    the control channel, similar to how the register settings are programmed
+    in the initvals.
+    
+    Also drop the unnecessary check for HT40 - this register can always be
+    written. This patch has been reported to improve HT40 stability and
+    throughput in some environments.
+    
+    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit 30d7434ccb853b96de698a040888fa4dacd0cc19
+Author: Felix Fietkau <nbd@openwrt.org>
+Date:   Mon Sep 8 18:31:26 2014 +0200
+
+    Revert "ath9k_hw: reduce ANI firstep range for older chips"
+    
+    This reverts commit 09efc56345be4146ab9fc87a55c837ed5d6ea1ab
+    
+    I've received reports that this change is decreasing throughput in some
+    rare conditions on an AR9280 based device
+    
+    Cc: stable@vger.kernel.org
+    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
 commit 15ed54948f508ad1baad79c30050e2d29a21696d
 Author: Felix Fietkau <nbd@openwrt.org>
 Date:   Fri Jul 25 16:18:03 2014 +0200
@@ -925,6 +1061,36 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	ieee80211_sta_ps_deliver_wakeup(sta);
  }
  
+@@ -1646,11 +1648,14 @@ ieee80211_rx_h_defragment(struct ieee802
+ 	sc = le16_to_cpu(hdr->seq_ctrl);
+ 	frag = sc & IEEE80211_SCTL_FRAG;
+ 
+-	if (likely((!ieee80211_has_morefrags(fc) && frag == 0) ||
+-		   is_multicast_ether_addr(hdr->addr1))) {
+-		/* not fragmented */
++	if (likely(!ieee80211_has_morefrags(fc) && frag == 0))
++		goto out;
++
++	if (is_multicast_ether_addr(hdr->addr1)) {
++		rx->local->dot11MulticastReceivedFrameCount++;
+ 		goto out;
+ 	}
++
+ 	I802_DEBUG_INC(rx->local->rx_handlers_fragments);
+ 
+ 	if (skb_linearize(rx->skb))
+@@ -1743,10 +1748,7 @@ ieee80211_rx_h_defragment(struct ieee802
+  out:
+ 	if (rx->sta)
+ 		rx->sta->rx_packets++;
+-	if (is_multicast_ether_addr(hdr->addr1))
+-		rx->local->dot11MulticastReceivedFrameCount++;
+-	else
+-		ieee80211_led_rx(rx->local);
++	ieee80211_led_rx(rx->local);
+ 	return RX_CONTINUE;
+ }
+ 
 --- a/net/mac80211/sta_info.h
 +++ b/net/mac80211/sta_info.h
 @@ -82,6 +82,7 @@ enum ieee80211_sta_info_flags {
@@ -2017,7 +2183,15 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	if (err < 0)
  		return err;
  	ieee80211_bss_info_change_notify(sdata, err);
-@@ -3073,7 +2766,8 @@ static int ieee80211_set_after_csa_beaco
+@@ -1164,7 +857,6 @@ static int ieee80211_stop_ap(struct wiph
+ 	sdata->u.ap.driver_smps_mode = IEEE80211_SMPS_OFF;
+ 
+ 	__sta_info_flush(sdata, true);
+-	ieee80211_free_keys(sdata, true);
+ 
+ 	sdata->vif.bss_conf.enable_beacon = false;
+ 	sdata->vif.bss_conf.ssid_len = 0;
+@@ -3073,7 +2765,8 @@ static int ieee80211_set_after_csa_beaco
  
  	switch (sdata->vif.type) {
  	case NL80211_IFTYPE_AP:
@@ -2027,7 +2201,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  		kfree(sdata->u.ap.next_beacon);
  		sdata->u.ap.next_beacon = NULL;
  
-@@ -3176,6 +2870,7 @@ static int ieee80211_set_csa_beacon(stru
+@@ -3176,6 +2869,7 @@ static int ieee80211_set_csa_beacon(stru
  				    struct cfg80211_csa_settings *params,
  				    u32 *changed)
  {
@@ -2035,7 +2209,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	int err;
  
  	switch (sdata->vif.type) {
-@@ -3210,20 +2905,13 @@ static int ieee80211_set_csa_beacon(stru
+@@ -3210,20 +2904,13 @@ static int ieee80211_set_csa_beacon(stru
  		     IEEE80211_MAX_CSA_COUNTERS_NUM))
  			return -EINVAL;
  
@@ -2062,7 +2236,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  		if (err < 0) {
  			kfree(sdata->u.ap.next_beacon);
  			return err;
-@@ -3367,7 +3055,6 @@ __ieee80211_channel_switch(struct wiphy 
+@@ -3367,7 +3054,6 @@ __ieee80211_channel_switch(struct wiphy 
  	sdata->csa_radar_required = params->radar_required;
  	sdata->csa_chandef = params->chandef;
  	sdata->csa_block_tx = params->block_tx;
@@ -2070,7 +2244,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	sdata->vif.csa_active = true;
  
  	if (sdata->csa_block_tx)
-@@ -3515,10 +3202,23 @@ static int ieee80211_mgmt_tx(struct wiph
+@@ -3515,10 +3201,23 @@ static int ieee80211_mgmt_tx(struct wiph
  	     sdata->vif.type == NL80211_IFTYPE_ADHOC) &&
  	    params->n_csa_offsets) {
  		int i;
@@ -2097,7 +2271,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	}
  
  	IEEE80211_SKB_CB(skb)->flags = flags;
-@@ -3598,21 +3298,6 @@ static int ieee80211_get_antenna(struct 
+@@ -3598,21 +3297,6 @@ static int ieee80211_get_antenna(struct 
  	return drv_get_antenna(local, tx_ant, rx_ant);
  }
  
@@ -2119,7 +2293,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  static int ieee80211_set_rekey_data(struct wiphy *wiphy,
  				    struct net_device *dev,
  				    struct cfg80211_gtk_rekey_data *data)
-@@ -3844,8 +3529,6 @@ const struct cfg80211_ops mac80211_confi
+@@ -3844,8 +3528,6 @@ const struct cfg80211_ops mac80211_confi
  	.mgmt_frame_register = ieee80211_mgmt_frame_register,
  	.set_antenna = ieee80211_set_antenna,
  	.get_antenna = ieee80211_get_antenna,
@@ -2128,7 +2302,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  	.set_rekey_data = ieee80211_set_rekey_data,
  	.tdls_oper = ieee80211_tdls_oper,
  	.tdls_mgmt = ieee80211_tdls_mgmt,
-@@ -3854,9 +3537,6 @@ const struct cfg80211_ops mac80211_confi
+@@ -3854,9 +3536,6 @@ const struct cfg80211_ops mac80211_confi
  #ifdef CONFIG_PM
  	.set_wakeup = ieee80211_set_wakeup,
  #endif
@@ -2312,7 +2486,17 @@ Date:   Mon May 19 21:20:49 2014 +0200
  
  	sdata->encrypt_headroom = IEEE80211_ENCRYPT_HEADROOM;
  
-@@ -1303,6 +1304,7 @@ static void ieee80211_setup_sdata(struct
+@@ -928,9 +929,6 @@ static void ieee80211_do_stop(struct iee
+ 		 * another CPU.
+ 		 */
+ 		ieee80211_free_keys(sdata, true);
+-
+-		/* fall through */
+-	case NL80211_IFTYPE_AP:
+ 		skb_queue_purge(&sdata->skb_queue);
+ 	}
+ 
+@@ -1303,6 +1301,7 @@ static void ieee80211_setup_sdata(struct
  	sdata->control_port_protocol = cpu_to_be16(ETH_P_PAE);
  	sdata->control_port_no_encrypt = false;
  	sdata->encrypt_headroom = IEEE80211_ENCRYPT_HEADROOM;
@@ -2320,7 +2504,7 @@ Date:   Mon May 19 21:20:49 2014 +0200
  
  	sdata->noack_map = 0;
  
-@@ -1721,6 +1723,8 @@ int ieee80211_if_add(struct ieee80211_lo
+@@ -1721,6 +1720,8 @@ int ieee80211_if_add(struct ieee80211_lo
  
  		ndev->features |= local->hw.netdev_features;
  
@@ -3109,3 +3293,205 @@ Date:   Mon May 19 21:20:49 2014 +0200
  
  		if (!compat)
  			compat = &sdata->vif.bss_conf.chandef;
+--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+@@ -1004,9 +1004,11 @@ static bool ar5008_hw_ani_control_new(st
+ 	case ATH9K_ANI_FIRSTEP_LEVEL:{
+ 		u32 level = param;
+ 
+-		value = level;
++		value = level * 2;
+ 		REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
+ 			      AR_PHY_FIND_SIG_FIRSTEP, value);
++		REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
++			      AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
+ 
+ 		if (level != aniState->firstepLevel) {
+ 			ath_dbg(common, ANI,
+@@ -1040,9 +1042,8 @@ static bool ar5008_hw_ani_control_new(st
+ 		REG_RMW_FIELD(ah, AR_PHY_TIMING5,
+ 			      AR_PHY_TIMING5_CYCPWR_THR1, value);
+ 
+-		if (IS_CHAN_HT40(ah->curchan))
+-			REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
+-				      AR_PHY_EXT_TIMING5_CYCPWR_THR1, value);
++		REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
++				  AR_PHY_EXT_TIMING5_CYCPWR_THR1, value - 1);
+ 
+ 		if (level != aniState->spurImmunityLevel) {
+ 			ath_dbg(common, ANI,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -517,6 +517,23 @@ static void ar9003_hw_spur_mitigate(stru
+ 	ar9003_hw_spur_mitigate_ofdm(ah, chan);
+ }
+ 
++static u32 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah,
++					     struct ath9k_channel *chan)
++{
++	u32 pll;
++
++	pll = SM(0x5, AR_RTC_9300_SOC_PLL_REFDIV);
++
++	if (chan && IS_CHAN_HALF_RATE(chan))
++		pll |= SM(0x1, AR_RTC_9300_SOC_PLL_CLKSEL);
++	else if (chan && IS_CHAN_QUARTER_RATE(chan))
++		pll |= SM(0x2, AR_RTC_9300_SOC_PLL_CLKSEL);
++
++	pll |= SM(0x2c, AR_RTC_9300_SOC_PLL_DIV_INT);
++
++	return pll;
++}
++
+ static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
+ 					 struct ath9k_channel *chan)
+ {
+@@ -647,6 +664,19 @@ static void ar9003_hw_override_ini(struc
+ 		ah->enabled_cals |= TX_CL_CAL;
+ 	else
+ 		ah->enabled_cals &= ~TX_CL_CAL;
++
++	if (AR_SREV_9340(ah) || AR_SREV_9531(ah) || AR_SREV_9550(ah)) {
++		if (ah->is_clk_25mhz) {
++			REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
++			REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
++			REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae);
++		} else {
++			REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1);
++			REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400);
++			REG_WRITE(ah, AR_SLP32_INC, 0x0001e800);
++		}
++		udelay(100);
++	}
+ }
+ 
+ static void ar9003_hw_prog_ini(struct ath_hw *ah,
+@@ -1779,7 +1809,12 @@ void ar9003_hw_attach_phy_ops(struct ath
+ 
+ 	priv_ops->rf_set_freq = ar9003_hw_set_channel;
+ 	priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
+-	priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
++
++	if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
++		priv_ops->compute_pll_control = ar9003_hw_compute_pll_control_soc;
++	else
++		priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
++
+ 	priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
+ 	priv_ops->init_bb = ar9003_hw_init_bb;
+ 	priv_ops->process_ini = ar9003_hw_process_ini;
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -702,6 +702,8 @@ static void ath9k_hw_init_pll(struct ath
+ {
+ 	u32 pll;
+ 
++	pll = ath9k_hw_compute_pll_control(ah, chan);
++
+ 	if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
+ 		/* program BB PLL ki and kd value, ki=0x4, kd=0x40 */
+ 		REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
+@@ -752,7 +754,8 @@ static void ath9k_hw_init_pll(struct ath
+ 		REG_RMW_FIELD(ah, AR_CH0_DDR_DPLL3,
+ 			      AR_CH0_DPLL3_PHASE_SHIFT, 0x1);
+ 
+-		REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
++		REG_WRITE(ah, AR_RTC_PLL_CONTROL,
++			  pll | AR_RTC_9300_PLL_BYPASS);
+ 		udelay(1000);
+ 
+ 		/* program refdiv, nint, frac to RTC register */
+@@ -768,7 +771,8 @@ static void ath9k_hw_init_pll(struct ath
+ 	} else if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
+ 		u32 regval, pll2_divint, pll2_divfrac, refdiv;
+ 
+-		REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
++		REG_WRITE(ah, AR_RTC_PLL_CONTROL,
++			  pll | AR_RTC_9300_SOC_PLL_BYPASS);
+ 		udelay(1000);
+ 
+ 		REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16);
+@@ -840,7 +844,6 @@ static void ath9k_hw_init_pll(struct ath
+ 		udelay(1000);
+ 	}
+ 
+-	pll = ath9k_hw_compute_pll_control(ah, chan);
+ 	if (AR_SREV_9565(ah))
+ 		pll |= 0x40000;
+ 	REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
+@@ -858,19 +861,6 @@ static void ath9k_hw_init_pll(struct ath
+ 	udelay(RTC_PLL_SETTLE_DELAY);
+ 
+ 	REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
+-
+-	if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
+-		if (ah->is_clk_25mhz) {
+-			REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
+-			REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
+-			REG_WRITE(ah,  AR_SLP32_INC, 0x0001e7ae);
+-		} else {
+-			REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1);
+-			REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400);
+-			REG_WRITE(ah,  AR_SLP32_INC, 0x0001e800);
+-		}
+-		udelay(100);
+-	}
+ }
+ 
+ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -1236,12 +1236,23 @@ enum {
+ #define AR_CH0_DPLL3_PHASE_SHIFT_S   23
+ #define AR_PHY_CCA_NOM_VAL_2GHZ      -118
+ 
++#define AR_RTC_9300_SOC_PLL_DIV_INT          0x0000003f
++#define AR_RTC_9300_SOC_PLL_DIV_INT_S        0
++#define AR_RTC_9300_SOC_PLL_DIV_FRAC         0x000fffc0
++#define AR_RTC_9300_SOC_PLL_DIV_FRAC_S       6
++#define AR_RTC_9300_SOC_PLL_REFDIV           0x01f00000
++#define AR_RTC_9300_SOC_PLL_REFDIV_S         20
++#define AR_RTC_9300_SOC_PLL_CLKSEL           0x06000000
++#define AR_RTC_9300_SOC_PLL_CLKSEL_S         25
++#define AR_RTC_9300_SOC_PLL_BYPASS           0x08000000
++
+ #define AR_RTC_9300_PLL_DIV          0x000003ff
+ #define AR_RTC_9300_PLL_DIV_S        0
+ #define AR_RTC_9300_PLL_REFDIV       0x00003C00
+ #define AR_RTC_9300_PLL_REFDIV_S     10
+ #define AR_RTC_9300_PLL_CLKSEL       0x0000C000
+ #define AR_RTC_9300_PLL_CLKSEL_S     14
++#define AR_RTC_9300_PLL_BYPASS       0x00010000
+ 
+ #define AR_RTC_9160_PLL_DIV	0x000003ff
+ #define AR_RTC_9160_PLL_DIV_S   0
+--- a/drivers/net/wireless/ath/ath9k/common.c
++++ b/drivers/net/wireless/ath/ath9k/common.c
+@@ -368,11 +368,11 @@ void ath9k_cmn_update_txpow(struct ath_h
+ {
+ 	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
+ 
+-	if (reg->power_limit != new_txpow) {
++	if (reg->power_limit != new_txpow)
+ 		ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
+-		/* read back in case value is clamped */
+-		*txpower = reg->max_power_level;
+-	}
++
++	/* read back in case value is clamped */
++	*txpower = reg->max_power_level;
+ }
+ EXPORT_SYMBOL(ath9k_cmn_update_txpow);
+ 
+--- a/drivers/net/wireless/b43/phy_common.c
++++ b/drivers/net/wireless/b43/phy_common.c
+@@ -276,8 +276,7 @@ void b43_phy_write(struct b43_wldev *dev
+ void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
+ {
+ 	assert_mac_suspended(dev);
+-	dev->phy.ops->phy_write(dev, destreg,
+-		dev->phy.ops->phy_read(dev, srcreg));
++	b43_phy_write(dev, destreg, b43_phy_read(dev, srcreg));
+ }
+ 
+ void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)

package/kernel/mac80211/patches/310-ap_scan.patch

 --- a/net/mac80211/cfg.c
 +++ b/net/mac80211/cfg.c
-@@ -1903,7 +1903,7 @@ static int ieee80211_scan(struct wiphy *
+@@ -1902,7 +1902,7 @@ static int ieee80211_scan(struct wiphy *
  		 * the  frames sent while scanning on other channel will be
  		 * lost)
  		 */

package/kernel/mac80211/patches/403-ath_regd_optional.patch

@@ -33,17 +33,18 @@
  	if (!wiphy->bands[IEEE80211_BAND_5GHZ])
  		return;
  
-@@ -631,6 +643,10 @@ ath_regd_init_wiphy(struct ath_regulator
- {
+@@ -632,6 +644,11 @@ ath_regd_init_wiphy(struct ath_regulator
  	const struct ieee80211_regdomain *regd;
  
+ 	wiphy->reg_notifier = reg_notifier;
++
 +#ifdef CPTCFG_ATH_USER_REGD
 +	return 0;
 +#endif
 +
- 	wiphy->reg_notifier = reg_notifier;
  	wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
  				   REGULATORY_CUSTOM_REG;
+ 
 --- a/drivers/net/wireless/ath/Kconfig
 +++ b/drivers/net/wireless/ath/Kconfig
 @@ -21,6 +21,9 @@ menuconfig ATH_CARDS