From c109c2f415f0247c656892b0e7ca74554a8531f0 Mon Sep 17 00:00:00 2001
From: nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 18 Jan 2015 09:25:43 +0000
Subject: [PATCH] ramips: add mt7621 cpu feature overrides

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44027 3c298f89-4303-0410-b956-a3cf2f4a3e73
---
 ...100-mt7621-add-cpu-feature-overrides.patch | 68 +++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 target/linux/ramips/patches-3.14/100-mt7621-add-cpu-feature-overrides.patch

diff --git a/target/linux/ramips/patches-3.14/100-mt7621-add-cpu-feature-overrides.patch b/target/linux/ramips/patches-3.14/100-mt7621-add-cpu-feature-overrides.patch
new file mode 100644
index 0000000000..f6f94f0383
--- /dev/null
+++ b/target/linux/ramips/patches-3.14/100-mt7621-add-cpu-feature-overrides.patch
@@ -0,0 +1,68 @@
+--- /dev/null
++++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
+@@ -0,0 +1,65 @@
++/*
++ * Ralink MT7621 specific CPU feature overrides
++ *
++ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
++ *
++ * This file was derived from: include/asm-mips/cpu-features.h
++ *	Copyright (C) 2003, 2004 Ralf Baechle
++ *	Copyright (C) 2004 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++#ifndef _MT7621_CPU_FEATURE_OVERRIDES_H
++#define _MT7621_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_has_tlb		1
++#define cpu_has_4kex		1
++#define cpu_has_3k_cache	0
++#define cpu_has_4k_cache	1
++#define cpu_has_tx39_cache	0
++#define cpu_has_sb1_cache	0
++#define cpu_has_fpu		0
++#define cpu_has_32fpr		0
++#define cpu_has_counter		1
++#define cpu_has_watch		1
++#define cpu_has_divec		1
++
++#define cpu_has_prefetch	1
++#define cpu_has_ejtag		1
++#define cpu_has_llsc		1
++
++#define cpu_has_mips16		1
++#define cpu_has_mdmx		0
++#define cpu_has_mips3d		0
++#define cpu_has_smartmips	0
++
++#define cpu_has_mips32r1	1
++#define cpu_has_mips32r2	1
++#define cpu_has_mips64r1	0
++#define cpu_has_mips64r2	0
++
++#define cpu_has_dsp		1
++#define cpu_has_dsp2		0
++#define cpu_has_mipsmt		1
++
++#define cpu_has_64bits		0
++#define cpu_has_64bit_zero_reg	0
++#define cpu_has_64bit_gp_regs	0
++#define cpu_has_64bit_addresses	0
++
++#define cpu_dcache_line_size()	32
++#define cpu_icache_line_size()	32
++
++#define cpu_has_dc_aliases	0
++#define cpu_has_vtag_icache	0
++
++#define cpu_has_rixi		0
++#define cpu_has_tlbinv		0
++#define cpu_has_userlocal	1
++
++#endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */
-- 
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