Commit e203a47a authored by pintu's avatar pintu

Initial commit with contributors

parent 0412d71c
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#The word of "Default" must not be removed
Default
CountryRegion=5
CountryRegionABand=7
CountryCode=
ChannelGeography=1
SSID=11n-AP
NetworkType=Infra
WirelessMode=5
EfuseBufferMode=0
Channel=0
BeaconPeriod=100
TxPower=100
BGProtection=0
TxPreamble=0
RTSThreshold=2347
FragThreshold=2346
TxBurst=1
PktAggregate=0
WmmCapable=1
AckPolicy=0;0;0;0
AuthMode=OPEN
EncrypType=NONE
WPAPSK=
DefaultKeyID=1
Key1Type=0
Key1Str=
Key2Type=0
Key2Str=
Key3Type=0
Key3Str=
Key4Type=0
Key4Str=
PSMode=CAM
AutoRoaming=0
RoamThreshold=70
APSDCapable=0
APSDAC=0;0;0;0
HT_RDG=1
HT_EXTCHA=0
HT_OpMode=0
HT_MpduDensity=4
HT_BW=1
HT_BADecline=0
HT_AutoBA=1
HT_AMSDU=0
HT_BAWinSize=64
HT_GI=1
HT_MCS=33
HT_MIMOPSMode=3
HT_DisallowTKIP=1
HT_STBC=0
VHT_BW=1
VHT_SGI=1
VHT_STBC=0
EthConvertMode=
EthCloneMac=
IEEE80211H=0
TGnWifiTest=0
WirelessEvent=0
MeshId=MESH
MeshAutoLink=1
MeshAuthMode=OPEN
MeshEncrypType=NONE
MeshWPAKEY=
MeshDefaultkey=1
MeshWEPKEY=
CarrierDetect=0
AntDiversity=0
BeaconLostTime=4
FtSupport=0
Wapiifname=ra0
WapiPsk=
WapiPskType=
WapiUserCertPath=
WapiAsCertPath=
PSP_XLINK_MODE=0
WscManufacturer=
WscModelName=
WscDeviceName=
WscModelNumber=
WscSerialNumber=
RadioOn=1
WIDIEnable=1
P2P_L2SD_SCAN_TOGGLE=3
Wsc4digitPinCode=0
P2P_WIDIEnable=0
PMFMFPC=0
PMFMFPR=0
PMFSHA256=0
#The word of "Default" must not be removed, maximum 32 cards, 00 ~ 31
Default
#CARDID, MAC, CARDTYPE
SELECT=CARDTYPE
00CARDID=/etc/Wireless/RT2870STA/RT2870STA1.dat
01CARDID=/etc/Wireless/RT2870STA/RT2870STA2.dat
02CARDID=/etc/Wireless/RT2870STA/RT2870STA3.dat
00MAC00:0E:2E:C3:D0:48=/etc/Wireless/RT2870STA/RT2870STA1.dat
01MAC00:40:F4:FF:AA:40=/etc/Wireless/RT2870STA/RT2870STA2.dat
02MAC00:0C:43:10:11:5C=/etc/Wireless/RT2870STA/RT2870STA3.dat
00CARDTYPEbgn=/etc/Wireless/RT2870STA/RT2870STA1.dat
01CARDTYPEbgn=/etc/Wireless/RT2870STA/RT2870STA2.dat
02CARDTYPEabgn=/etc/Wireless/RT2870STA/RT2870STA3.dat
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/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
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/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
#ifndef __RT_QA_H__
#define __RT_QA_H__
#ifdef RALINK_QA
#ifndef RALINK_ATE
#error "For supporting QA GUI, please set HAS_ATE=y and HAS_QA_SUPPORT=y."
#endif /* RALINK_ATE */
#include "rt_ate.h"
typedef struct ate_racfghdr {
UINT32 magic_no;
USHORT command_type;
USHORT command_id;
USHORT length;
USHORT sequence;
USHORT status;
UCHAR data[2046];
} __attribute__((packed))RACFGHDR, *pRACFGHDR;
/* Stop Transmission */
#define ATE_TXSTOP ((~(fATE_TX_ENABLE))&(~(fATE_TXCONT_ENABLE))&(~(fATE_TXCARR_ENABLE))&(~(fATE_TXCARRSUPP_ENABLE)))
/* Stop Receiving Frames */
#define ATE_RXSTOP (~(fATE_RX_ENABLE))
/* NOTE : may be different with chipset in the future ++ */
#define BBP22_TXFRAME 0x00 /* Transmit Frames */
#define BBP22_TXCONT_OR_CARRSUPP 0x80 /* Continuous Transmit or Carrier Suppression */
#define BBP22_TXCARR 0xc1 /* Transmit Carrier */
#define BBP24_TXCONT 0x00 /* Continuous Transmit */
#define BBP24_CARRSUPP 0x01 /* Carrier Suppression */
/* NOTE : may be different with chipset in the future -- */
/* Eth QA RACFG Command */
#define RACFG_MAGIC_NO 0x18142880
/* command id with Cmd Type == 0x0005(for iNIC)/0x0008(for others) */
#define RACFG_CMD_RF_WRITE_ALL 0x0000
#define RACFG_CMD_E2PROM_READ16 0x0001
#define RACFG_CMD_E2PROM_WRITE16 0x0002
#define RACFG_CMD_E2PROM_READ_ALL 0x0003
#define RACFG_CMD_E2PROM_WRITE_ALL 0x0004
#define RACFG_CMD_IO_READ 0x0005
#define RACFG_CMD_IO_WRITE 0x0006
#define RACFG_CMD_IO_READ_BULK 0x0007
#define RACFG_CMD_BBP_READ8 0x0008
#define RACFG_CMD_BBP_WRITE8 0x0009
#define RACFG_CMD_BBP_READ_ALL 0x000a
#define RACFG_CMD_GET_COUNTER 0x000b
#define RACFG_CMD_CLEAR_COUNTER 0x000c
#define RACFG_CMD_RSV1 0x000d
#define RACFG_CMD_RSV2 0x000e
#define RACFG_CMD_RSV3 0x000f
#define RACFG_CMD_TX_START 0x0010
#define RACFG_CMD_GET_TX_STATUS 0x0011
#define RACFG_CMD_TX_STOP 0x0012
#define RACFG_CMD_RX_START 0x0013
#define RACFG_CMD_RX_STOP 0x0014
#define RACFG_CMD_GET_NOISE_LEVEL 0x0015
#define RACFG_CMD_ATE_START 0x0080
#define RACFG_CMD_ATE_STOP 0x0081
#define RACFG_CMD_ATE_START_TX_CARRIER 0x0100
#define RACFG_CMD_ATE_START_TX_CONT 0x0101
#define RACFG_CMD_ATE_START_TX_FRAME 0x0102
#define RACFG_CMD_ATE_SET_BW 0x0103
#define RACFG_CMD_ATE_SET_TX_POWER0 0x0104
#define RACFG_CMD_ATE_SET_TX_POWER1 0x0105
#define RACFG_CMD_ATE_SET_FREQ_OFFSET 0x0106
#define RACFG_CMD_ATE_GET_STATISTICS 0x0107
#define RACFG_CMD_ATE_RESET_COUNTER 0x0108
#define RACFG_CMD_ATE_SEL_TX_ANTENNA 0x0109
#define RACFG_CMD_ATE_SEL_RX_ANTENNA 0x010a
#define RACFG_CMD_ATE_SET_PREAMBLE 0x010b
#define RACFG_CMD_ATE_SET_CHANNEL 0x010c
#define RACFG_CMD_ATE_SET_ADDR1 0x010d
#define RACFG_CMD_ATE_SET_ADDR2 0x010e
#define RACFG_CMD_ATE_SET_ADDR3 0x010f
#define RACFG_CMD_ATE_SET_RATE 0x0110
#define RACFG_CMD_ATE_SET_TX_FRAME_LEN 0x0111
#define RACFG_CMD_ATE_SET_TX_FRAME_COUNT 0x0112
#define RACFG_CMD_ATE_START_RX_FRAME 0x0113
#define RACFG_CMD_ATE_E2PROM_READ_BULK 0x0114
#define RACFG_CMD_ATE_E2PROM_WRITE_BULK 0x0115
#define RACFG_CMD_ATE_IO_WRITE_BULK 0x0116
#define RACFG_CMD_ATE_BBP_READ_BULK 0x0117
#define RACFG_CMD_ATE_BBP_WRITE_BULK 0x0118
#define RACFG_CMD_ATE_RF_READ_BULK 0x0119
#define RACFG_CMD_ATE_RF_WRITE_BULK 0x011a
#define RACFG_CMD_ATE_SET_TX_POWER2 0x011b
#ifdef TXBF_SUPPORT
#define RACFG_CMD_ATE_TXBF_DUT_INIT 0x011c
#define RACFG_CMD_ATE_TXBF_LNA_CAL 0x011d
#define RACFG_CMD_ATE_TXBF_DIV_CAL 0x011e
#define RACFG_CMD_ATE_TXBF_PHASE_CAL 0x011f
#define RACFG_CMD_ATE_TXBF_GOLDEN_INIT 0x0120
#define RACFG_CMD_ATE_TXBF_VERIFY 0x0121
#endif /* TXBF_SUPPORT */
#ifdef RLT_RF
#define RACFG_CMD_ATE_RF_READ_BULK_BANK 0x0123
#define RACFG_CMD_ATE_RF_WRITE_BULK_BANK 0x0124
#endif /* RLT_RF */
#define RACFG_CMD_TX_START_V2 0x0125
#if defined (RT6352) || defined (MT76x0)
#define RACFG_CMD_ATE_CALIBRATION 0x0204
#endif /* defined (RT6352) || defined (MT76x0) */
#ifdef RT6352
#define RACFG_CMD_ATE_TSSI_COMPENSATION 0x0205
#define RACFG_CMD_ATE_TEMP_COMPENSATION 0x0206
#endif /* RT6352 */
/* QA RACFG Command for ate test from localhost */
#define RACFG_CMD_ATE_SHOW_PARAM 0xff00
/* ATE export paramters to uppler layer */
typedef struct __ATE_EX_PARAM
{
unsigned char mode;
char TxPower0;
char TxPower1;
#ifdef DOT11N_SS3_SUPPORT
char TxPower2;
#endif /* DOT11N_SS3_SUPPORT */
char TxAntennaSel;
char RxAntennaSel;
unsigned char DA[MAC_ADDR_LEN];
unsigned char SA[MAC_ADDR_LEN];
unsigned char BSSID[MAC_ADDR_LEN];
unsigned char MCS;
unsigned char PhyMode;
BOOLEAN ShortGI;
BOOLEAN BW;
unsigned int Channel;
unsigned int TxLength;
unsigned int TxCount;
unsigned int RFFreqOffset;
unsigned int IPG;
unsigned int RxTotalCnt;
unsigned int RxCntPerSec;
char LastSNR0;
char LastSNR1;
char LastSNR2;
char LastRssi0;
char LastRssi1;
char LastRssi2;
char AvgRssi0;
char AvgRssi1;
char AvgRssi2;
short AvgRssi0X8;
short AvgRssi1X8;
short AvgRssi2X8;
}ATE_EX_PARAM, *pATE_EX_PARAM;
NDIS_STATUS TXSTOP(
IN PRTMP_ADAPTER pAd);
NDIS_STATUS RXSTOP(
IN PRTMP_ADAPTER pAd);
#endif /* RALINK_QA */
#endif /* __RT_QA_H__ */
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/*
*************************************************************************
* Ralink Tech Inc.
* 5F., No.36, Taiyuan St., Jhubei City,
* Hsinchu County 302,
* Taiwan, R.O.C.
*
* (c) Copyright 2002-2010, Ralink Technology, Inc.
*
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
* *
*************************************************************************/
#ifdef RT28xx
#include "rt_config.h"
VOID RT28xx_ch_tunning(RTMP_ADAPTER *pAd, INT bw)
{
if (pAd->MACVersion != 0x28600100)
return;
if (bw == BW_20)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
}
else if (bw == BW_40)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
}
DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n"));
}
VOID RT28xx_ChipSwitchChannel(
IN PRTMP_ADAPTER pAd,
IN UCHAR Channel,
IN BOOLEAN bScan)
{
CHAR TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
UCHAR index;
UINT32 Value = 0; /*BbpReg, Value;*/
UCHAR RFValue = 0;
UINT32 i = 0;
ULONG R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0;
RTMP_RF_REGS *RFRegTable;
CHAR lan_gain;
/* Search Tx power value*/
/*
We can't use ChannelList to search channel, since some central channl's txpowr doesn't list
in ChannelList, so use TxPower array instead.
*/
for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
{
if (Channel == pAd->TxPower[index].Channel)
{
TxPwer = pAd->TxPower[index].Power;
TxPwer2 = pAd->TxPower[index].Power2;
break;
}
}
if (index == MAX_NUM_OF_CHANNELS)
{
DBGPRINT(RT_DEBUG_ERROR, ("%s(): Can't find the Channel#%d \n", __FUNCTION__, Channel));
}
RFRegTable = RF2850RegTable;
switch (pAd->RfIcType)
{
case RFIC_2820:
case RFIC_2850:
case RFIC_2720:
case RFIC_2750:
for (index = 0; index < NUM_OF_2850_CHNL; index++)
{
if (Channel == RFRegTable[index].Channel)
{
R2 = RFRegTable[index].R2;
if (pAd->Antenna.field.TxPath == 1)
{
R2 |= 0x4000; /*If TXpath is 1, bit 14 = 1;*/
}
if ((pAd->Antenna.field.RxPath == 2)
)
{
R2 |= 0x40; /*write 1 to off Rxpath.*/
}
else if ((pAd->Antenna.field.RxPath == 1)
)
{
R2 |= 0x20040; /*write 1 to off RxPath*/
}
if (Channel > 14)
{
/* initialize R3, R4*/
R3 = (RFRegTable[index].R3 & 0xffffc1ff);
R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15);
/* 5G band power range: 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0" means the TX power reduce 7dB*/
/*R3*/
if ((TxPwer >= -7) && (TxPwer < 0))
{
TxPwer = (7+TxPwer);
/* TxPwer is not possible larger than 15 */
R3 |= (TxPwer << 10);
DBGPRINT(RT_DEBUG_TRACE, ("%s(): TxPwer=%d \n", __FUNCTION__, TxPwer));
}
else
{
TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
R3 |= (TxPwer << 10) | (1 << 9);
}
/* R4*/
if ((TxPwer2 >= -7) && (TxPwer2 < 0))
{
TxPwer2 = (7+TxPwer2);
R4 |= (TxPwer2 << 7);
DBGPRINT(RT_DEBUG_TRACE, ("%s(): TxPwer2=%d \n", __FUNCTION__, TxPwer2));
}
else
{
TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
R4 |= (TxPwer2 << 7) | (1 << 6);
}
}
else
{
R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9); /* set TX power0*/
R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15) | (TxPwer2 <<6);/* Set freq Offset & TxPwr1*/
}
/* Based on BBP current mode before changing RF channel.*/
if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40)
)
{
R4 |=0x200000;
}
/* Update variables*/
pAd->LatchRfRegs.Channel = Channel;
pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
pAd->LatchRfRegs.R2 = R2;
pAd->LatchRfRegs.R3 = R3;
pAd->LatchRfRegs.R4 = R4;
/* Set RF value 1's set R3[bit2] = [0]*/
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
RTMPusecDelay(200);
/* Set RF value 2's set R3[bit2] = [1]*/
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
RTMPusecDelay(200);
/* Set RF value 3's set R3[bit2] = [0]*/
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
break;
}
}
DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%lu, Pwr1=%lu, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
Channel,
pAd->RfIcType,
(R3 & 0x00003e00) >> 9,
(R4 & 0x000007c0) >> 6,
pAd->Antenna.field.TxPath,
pAd->LatchRfRegs.R1,
pAd->LatchRfRegs.R2,
pAd->LatchRfRegs.R3,
pAd->LatchRfRegs.R4));
break;
default:
DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d : unknown RFIC=%d\n", Channel, pAd->RfIcType));
break;
}
/* Change BBP setting during siwtch from a->g, g->a*/
lan_gain = GET_LNA_GAIN(pAd);
if (Channel <= 14)
{
ULONG TxPinCfg = 0x00050F0A; /*Gary 2007/08/09 0x050A0A*/
CHAR lan_gain = GET_LNA_GAIN(pAd);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - lan_gain));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - lan_gain));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - lan_gain));
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - lan_gain)); According the Rory's suggestion to solve the middle range issue.*/
/* Rx High power VGA offset for LNA select*/
{
if (pAd->NicConfig2.field.ExternalLNAForG)