- Apr 17, 2015
-
-
rmilecki authored
Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45473 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
rmilecki authored
Signed-off-by:
-
nbd authored
Signed-off-by:
Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45471 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
- Apr 16, 2015
-
-
rmilecki authored
Signed-off-by:
-
rmilecki authored
The mips74k subtarget of brcm47xx configures gcc to compile for mips32r2; however, the generated kernel config for 3.14 and later kernels ends up with CPU_MIPS32_R1 and CPU_MIPSR1 selected. The generated kernel config for the 3.10 kernel (Barrier Breaker) properly selected CPU_MIPS32_R2 and CPU_MIPSR2. Modify the default kernel config for mips74k to explicitly select CPU_MIPS32_R2 and CPU_MIPSR2. Signed-off-by:
Nathan Hintz <nlhintz@hotmail.com> Tested-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Depending on configuration, disable the LED before writing the trigger and enable it after writing it. Fixes LEDs where the value defaults to 1 Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
luka authored
Signed-off-by:
Luka Perkov <luka@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45459 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
kaloz authored
Signed-off-by:
Imre Kaloz <kaloz@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45456 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
luka authored
Signed-off-by:
-
luka authored
Signed-off-by:
-
- Apr 15, 2015
-
-
luka authored
Signed-off-by:
-
luka authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
cyrus authored
Signed-off-by:
Steven Barth <steven@midlink.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45449 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
cyrus authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
- Apr 14, 2015
-
-
nbd authored
uclient: update to the latest version, fixes a crash in processing redirect/disconnect after headers Signed-off-by:
-
rmilecki authored
Signed-off-by:
-
rmilecki authored
Signed-off-by:
-
rmilecki authored
This will allow adding more modes without options conflict. Signed-off-by:
-
blogic authored
adds support for reading md5 sums of files Signed-off-by:
John Crispin <blogic@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45442 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
blogic authored
fixes long writes when using polarssl Signed-off-by:
-
blogic authored
fixes issues with semi-initialized overlay partitions during firstboot Signed-off-by:
-
blogic authored
Open-Mesh OM5P-AN use a AT8035 (F1E) behind one of the ethernet ports. This PHY requires special flags to work correctly. Otherwise massive packet loss happens with active POE or when switching the link speed from gigabit ethernet to fast ethernet. The generic PHY doesn't have support to change these settings. Signed-off-by:
Sven Eckelmann <sven@open-mesh.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45439 3c298f89-4303-0410-b956-a3cf2f4a3e73
-
blogic authored
The OM5P-AN boards are suffering from ethernet packet loss when booting with some active POE setups or when switching to Fast Ethernet when previously booted with Gigabit ethernet attached. The cause of the problem is that the AR8035 PHYs requires special register settings to work reliably on these boards. Enable the RGMII TX, RX delays and disable SmartEE functionality of the AR8035 PHYs. Also enable the RXD and RDV delay in the ETH_CFG register to fix the issue. Signed-off-by:
-
blogic authored
Signed-off-by:
-
rmilecki authored
Signed-off-by:
-
cyrus authored
Signed-off-by:
-
nbd authored
Signed-off-by:
-
